Friday, August 1, 2014

Determination of Practical Harmonic Levels

Well we are still waiting to see if borrowing 3D EM software is on the cards. I should know soon, one way or the other. I hope it happens, but for now let’s keep holding off on Elephant #3, ‘Fixing the Broken Automotive Test Fixture,’ In the meantime, we can continue the engineering approach on determining a practical level of harmonics in RF immunity for Elephant #2,  ‘Disharmony in Harmonic Limits,’ which became a subset of our project on linearizing EMC amplifiers.

Also, I listened in on the Agilent July 24 webcast, “a day in the life of your cell phone," which was pretty good. During the webcast, I asked via the dialog box what the maximum radiated power from a cell phone was, and when did it emit this maximum level (at switch-on, when setting up an incoming call, etc)? The answer given was "when the cell phone is furthest away from a base station." This is a partial answer and I suspect only applies to when the transmission channel between the base station and the cell phone is already set up. It's not the answer we wanted, so I will ask for further clarification from the webcast organizers. Until they get back to me, we will hold off on ‘The Cell Phone Threat.’

The Linearization of EMC Amplifiers

Reminder: In previous posts on this thread, we asked the $64,000 question,"what is a practical level of harmonics in a RF immunity system?"

To help answer this question, we derived the equation for the amount of harmonic field compared to the wanted test frequency field. We christened this test field integrity indicator as E2dBc.

We then used the equation to determine what level of amplifier harmonics would create the commercial limit of -6dBc test field harmonics. This came out at -10dBc, to which we added a safety factor of 3dB, giving our initial determination of sensible amplifier harmonics as -13dBc.

The EMC amplifier linearization exercise we are conducting is over 1-18 GHz, so previously we chose a horn antenna with characteristics very similar to the majority of 1-18 GHz horn antennas out there in the marketplace. Their performances are so close I think we can assume the various suppliers use the self-same design or rebrand the self-same antenna. For ease of reference, the amplifier data table is repeated here.

For the particular antenna in question, the relevant worst-case gain difference was at 8 GHz when the 8 GHz linear gain G1 was 12.66 and the 16 GHz linear gain G2 was 31.56. The table already states the relative difference for us in decibels as 4dB. We will need this later.

Separately, we established the amount of harmonic field permitted in commercial product testing as up to one-third of the total test field.

One-third seems on the high side, so let’s play with the E2dBc equation a little longer to try and justify a level suited to both commercial and automotive RF immunity testing.

We want to flit easily between the variables so we will make life easy for ourselves by deriving E2dBc in its simplest and most useful form.

E2dBc = 10log10 [G2.P2]

Expanding gives:

E2dBc = 10log10 [G2/G1] + 10log10 [P2/P1]

Which, purely for convenience, we will rearrange to read:

E2dBc = 10log10 [P2/P1] + 10log10 [G2/G1]

But 10log10 [P2/P1] is P2dBc and 10log10 [G2/G1] is G2dBc.

That is P2dBc is the level of the harmonic relative to the fundamental frequency in dBs (worst-case is always stated on the amplifier data sheet) and G2dBc is the gain the antenna presents to the harmonic relative to the gain the antenna presents to the fundamental, again in dBs (obtainable by inspection of the antenna data sheet).

Therefore, the test field integrity indication equation is:

E2dBc = P2dBc + G2dBc

Now it is simplicity itself to flit between a) E2dBc, the harmonic level compared to the fundamental in the test field itself, and b) P2dBc, the harmonic level compared to the fundamental from the amplifier, and c) G2dBc, the gain the antenna presents to the harmonic compared to the gain it presents to the fundamental in dBs.

Now we use the new equation to establish the field harmonic level E2dBc if we use the proposed -13dBc amplifier harmonics.

E2dBc = P2dBc + G2dBc
E2dBc = -13 + G2dBc

We already know from the antenna table that the worst-case G2dBc is 4dB.

E2dBc = -13 + 4

E2dBc = -9

Impact of First Determination of Amplifier Harmonics on the Integrity of the Test Field

If E2dBc is changed from -6 to -9, what change does this cause in the make-up of the commercial test field?

The Total Test Field E = E1 + E2

If E2dBc = -9, that means 20 log10 [E2/E1] = -9

E2/E1 = antilog10 (-9/20)

E2/E1 = 0.355

E2 = 0.355*E1

Substituting this into Total Test Field E = E1 + E2

E = E1 + 0.355*E1

E = E1 (1 + 0.355)

E = 1.355*E1

E1 = E/1.355

E1 = 0.74*E

This means E1 is pretty close to 75% of the total field which in turn means E2 is close to 25% of the total field.

For the calibrated commercial test field of 18v/m, 13.5v/m will be at the intended frequency and 4.5v/m will be at the harmonic frequency.

For the automotive test field of 200v/m, 150v/m will be at the intended frequency and 50v/m will be at the harmonic frequency.

It is plain that this basic method could be used to see the effect of amplifier harmonic limits anywhere between -10dBc and -20dBc.

In terms of our TWT Amplifier linearization target, I believe we are there at -13dBc.

Next time we will look at the diminished return between improved amplifier harmonics and the integrity of the total test field.

-Tom Mullineaux

Friday, July 11, 2014

Avoid the Most Common Failures with These 7 Essential EMC Design Rules

A reader recently asked me what the top design rules were that they could implement on their product to maximize the chances of passing FCC and CE testing. There’s no doubt that there are countless ways to fail emissions and immunity tests, but a pattern of failure modes did emerge at my EMC lab.

Regardless of the type of product I was testing, be it medical, industrial, consumer or any other industry for that matter, there were a few areas where manufacturers consistently failed EMC tests. Was it possible that EMC failures were distributed according to Pareto’s Law? i.e. 80% of the failures were due to 20% of the cause mechanisms. It seemed possible.

If you want to avoid some of the most common EMC pitfalls, and avoid costly re-tests and launch delays, read on…

1. Reduce RF Noise On The Cables

Cables act like antennas for radio noise. One of the top failure modes I saw at the lab were due partly or wholly to EM radiation from the cabling attached to the device under test (DUT).

How good they are at converting the conducted noise to radiated noise (i.e. how good an antenna it is) varies greatly depending on several key factors including the impedance match, the length of the cable and the wavelength of the noise. To avoid radiated emissions issues due to cabling, it’s really important to ensure that as little unintentional noise is coupled on to external and internal cabling as possible.

If a manufacturer runs into a radiated emissions issue at a test lab, one of the first methods of debug is usually to detach as many I/O cables as possible. If the offending emission disappears, then you can start re-connecting the cables one-by-one until you (hopefully) find the culprit. Note that if there are multiple cables, it can very often be the case that each cable contributes towards a particular issue and connecting/disconnecting them in various configurations can lead to seemingly inconsistent measurement results. This is typically due to connecting/disconnecting ground loops of various sizes. Regardless of this, the rule of thumb to keep in mind at the design stage is to keep as much unintended RF energy off every cable as possible.

There are a few ways you can help to minimize the noise emissions from cabling:

Ensure Slew Rate of Signals on the Cables are Minimized

Digital signals can contain RF energy across a high bandwidth. The upper limit of the bandwidth depends on the slew rate of the rising and falling edges of the signal. The higher the slew rate, the more energy the signal contains at higher frequencies. As you can see from the figure to the right, the RF energy contained within a 1 MHz square wave spans a large spectrum.

 It’s usually possible to reduce the slew rate of digital signals coupled on to cabling by either reducing the drive strength of the driver, or passing the signals through a low-pass filter. By lowering the slew rate, you can greatly reduce the RF energy coupled on to the signals and therefore reduce the amount of radiation from the cabling.

A good ‘get-out-of-jail-free’ rule of thumb is to include a non-populated low-pass filter on every digital signal that passes over a cable. A simple and cheap R-C filter will do the job if your eye diagram can take the hit. Otherwise, more expensive integrated solutions are available. See section 4.2.2 in our EMC design guidelines eBook for more details.

Make Sure Any Power, Ground Shield GND and Static I/O Signals Are Clean

Although on the surface of it, you’d think that DC signals such as power supplies and static I/O signals should not contribute a significant amount of RF energy to cabling. However, these signals can often be the culprit with cable noise. A global reset signal for instance usually goes to several chips and areas of a PCB. If you’re not careful, this trace can pick up a significant amount of RF noise. When the reset signal traverses a cable, the noise can now be emitted as electromagnetic radiation, sometime causing issues with radiated emission testing.

You could write books on ways to minimize these contributions, and many people a lot smarter than I am, have written many. However, here are a couple of easy to implement tips that I’ve seen work very effectively at keeping RF noise off cabling.

(a) Add in-line ferrite beads on power supply and static I/O signals

Noise suppression beads are designed to absorb RF energy and convert it to heat. There are thousands to choose from and so it’s worth putting in a bit of time to choose carefully. To over-simplify a complex issue, basically you want the frequency of the peak impedance of the ferrite bead to match the frequency of perceived worst case noise in your circuit so that the energy at that frequency is turned into heat.

Even if you decide not to incorporate ferrite beads into your design, it’s a very good idea to leave space for them and put 0 Ohm resistors instead. It could save an expensive and time consuming re-spin of your circuit board if you run into problems at an EMC lab.

(b) Provide adequate power supply de-coupling at the connector

If your on-board power supply does not provide a low impedance source of RF current across the spectrum that your switching circuitry demands it, then it’s going to look for it up-stream. Practically speaking, that means the power supply signals on your cabling are going be noisy. And noisy cables tend to radiate pretty well. Although there is much more to it than this, make sure you have adequate bulk capacitance on board and distributed capacitance across your PCB to supply current locally across a broad frequency spectrum.

2. Connector Ground ESD

One of the most common issues that came up again and again was related to ESD testing. ESD testing is usually required as a general CE testing requirement and also applies to other product specific standards. In particular, electrostatic discharges applied to chassis ground connections at I/O connectors showed a disproportionate number of failures. The failures usually showed up in the form of the devices resetting, or worse – a ‘permanent degradation of performance’ i.e. It fried something important.

According to the adjacent table, taken from the root ESD testing standard (61000-4-2), ESD pulses are applied using the ‘contact discharge’ method to exposed metallic shells on connectors. These are usually connected to the PCB chassis ground through the connector. The amplitude of the discharge pulse depends on your product standard, but is typically 4kV or 8kV for most applications.

This is applied using a pointed tip as shown in the picture below.

 Here is a breakdown on ways to avoid this very common issue:

Identify the ESD Testing Locations

In order to apply ESD protection to your product in the right places, you should know where the test lab is going to ‘zap’ it.
Unless stated otherwise in the generic, product-related or product-family standards, the
electrostatic discharges shall be applied only to those points and surfaces of the EUT which are accessible to persons during normal use.
What this is saying is that if you can reach it with your finger, then it should be tested. The test lab will do some exploratory testing on the housing of your product to see if they can find any susceptible locations. If the chassis is non-conductive then often there won’t be many discharge points. Even on non-conductive chassis though, there are some common discharge points:
  • Connectors
  • Screw heads
  • Buttons/Keypads
  • Seams where two parts of the chassis come together
  • Areas where internal PCBs come very close to the chassis
  • LEDs or graphic displays
At 8kV or 16kV, the arcing distance can be quite far, so it’s possible for discharges to find a way to the circuit board, even through a non-conductive housing.

Identify the ESD Levels

The ESD test levels are typically set by the product standard that applies to your product. For example, the consumer audio EMC immunity standard is EN55103-2, where the ESD test levels are defined as 8kV air discharge and 4kV contact discharge for almost all usage environments.

Select The Right Transient Suppressor

Once you know the discharge test levels and where the discharges will be applied, you can proceed to selecting some ESD protection for your circuit boards. You can refer to section 4.6.1 from our EMC design guidelines eBook which goes into detail on these selections. There are plenty of options to choose from including spark gaps, resistors, capacitors, varistors and TVS diodes to name a few. A good ESD suppressor will clamp the maximum voltage seen across the device to a known level, and dissipate the extra energy into heat or noise.

Apply in the Right Location

A critical aspect that is sometimes overlooked is the placement of the ESD protection. It must be placed as close as physically possible to area where the discharge event is going to happen. This minimizes the series inductance of any routing between the discharge location and the transient suppressor.

Design Your Discharge Path Properly

It’s important to visualize where the discharge path is for the discharges applied to a chassis ground on a connector. For many designs, the chassis ground is separated from the main board ground for safety reasons or even specifically for dealing with ESD.

A tried and tested methodology is to bring the chassis ground on your circuit board ground back to the main power input so that any discharges can dissipate through this point without affecting the rest of your circuitry.

3. Choose the Right Power Adapter

If your product has an external power supply or internal sealed power converter, it’s very important to know how noisy these devices are. This can have a critical effect on your product’s conducted emissions performance. A $4 power supply can ultimately mean the difference between a pass or a fail at an EMC lab.

At the simplest level, you should ensure that the power adapter has passed the emissions class that your product needs to pass.
Class A digital devices are ones that are marketed exclusively for use in business, industrial and commercial environments.

Class B digital devices are ones that are marketed for use anywhere, including residential environments.
Class B emissions limits are more strict than class A limits, so if your product is class B, then make sure that you’re using a class B power supply.

Unfortunately a compliant power adapter cannot guarantee that you’ll pass conducted emissions testing at an EMC lab. There are a couple of main reasons for this:

1. The emissions performance of a power adapter will likely have been tested at an EMC lab with only a DC resistive load connected to the output. It may well have passed class B emission limits with a DC load, but the emission characteristics of the adapter may be much different if it’s connected to a dynamic load with current supply requirements spread across a wide spectrum. A compliant power adapter can’t solve all of your conducted emission problems, you will also need to design your on-board power circuitry carefully to ensure that the RF current demands on the power adapter are minimized.

2. Power adapters are occasionally (ahem!) not as compliant as their labeling suggests. Giving the benefit of the doubt, some cheaper power adapter manufacturers suffer from quality control issues whereby some batches of adapters have worse emissions performance than the adapters they sent for testing at an EMC lab. A less trusting person might guess that some power supply manufacturers intentionally cost reduced their power adapter design after receiving their FCC or CE certificate. Or even worse, they may have acquired fraudulent test reports. But I’m not suggesting that.

It’s important that you request the test report from the power adapter manufacturer so that you can verify their claims. It’s also a good idea to provide your test lab with a couple of alternative samples of power adapter in case one of them is non-compliant.

4. All LCDs are Not Created Equally

In the same way that your power adapter can have a big impact on your product’s conducted emissions performance, an LCD display can have a huge effect on your product’s radiated emissions performance.

Often an LCD will have a built-in controller of some sort, with an integrated micro. Some LCDs can have much worse radiated emissions performance than a seemingly identical model from a different manufacturer.

It’s always a good idea to order some samples from several LCD manufacturers and either do an emissions pre-scan at a test lab or do some relative emissions measurements in-house if you have the right pre-compliance test gear. Usually there will be an identical drop in module from a different manufacturer available, so you can swap out an offending LCD if you run into issues. But if the LCD design is electrically or mechanically unique, this can be a really expensive and time consuming issue to fix.

As a side note, LCDs connected via a flex cable, or sometimes even via a DIP connector can exhibit significant radiated emissions due to the high slew rate digital signals. Follow the guidelines in point (1) above for implementing filters on the signals before they hit the connector/cable.

5. Make Sure Auxiliary Equipment is Compliant

Here’s how a $5 USB flash drive can cost your company $2,000 and 1 week time to market.

It’s a bit unfortunate, but lots of manufacturers fail due to no fault of their own. As a general rule for emissions testing, manufacturers are required to connect auxiliary equipment to all I/O ports in order to fully exercise the functionality of their device. The FCC want to see worst case emissions profile, which involves exercising all interfaces and functionality.

For example, if the product includes a USB port that can connect to a USB flash drive in normal usage, then a USB flash drive must be provided with your equipment to your test lab. Surf on over to EBay and you’ll find that $5 can get you a no-name brand (possibly not FCC/CE compliant) 2GB flash drive, including shipping! At USB frequencies, a non-compliant device can cause you some really expensive headaches. You may spend hours debugging what you think is an emissions issue on your circuit board when it’s actually emissions emanating from a cheap USB flash drive. It may mean a trip back to your office and re-booking the test lab for a later date. All of a sudden, a $5 USB drive can cost you well over $2000 in extra expenses.

The rule of thumb here is easy:
Make sure that all auxiliary equipment that you supply to the test lab is from a reputable manufacturer so that you know it’s tested and compliant.
6. Select the Correct Rating of Protection

It was very often the case that manufacturers had included transient protection circuitry, but had neglected to ensure that the rating of the devices were high enough to cope with the pulse that had to be applied.

I’ve included a table below of the normal ‘suite’ of transient disturbances that are applied to products during CE testing. I’ve also included some examples of test levels that may be applied. Note that this is from an old test report and the base standards and levels may not be up to date.
 Selecting a transient device with a high enough rating to deal with the applied disturbances is critical to ensuring a first time pass. You need to be sure of the test levels that a test lab is going to apply to your product in order to know what type of protection you need to design in.

7. Shield Any Sensitive Analog/RF Circuitry

If your device contains any relatively sensitive analog circuitry, it’s a good idea to include a well grounded conductive shield. For CE testing, your product is more than likely going to be subjected to a radiated RF field in the 1 V/m to 10 V/m magnitude, modulated with a sine wave in the kHz region, swept over the frequency range 80 MHz – 6 GHz. It’s worth noting that some industries such as automotive, aerospace and military must design their products to a much higher specification and different types of modulation and sweep ranges are possible.

The energy in the RF field can couple to your circuit board in a number of ways, but in terms of pass/fail criteria, what you should be interested in is whether the field can negatively affect the performance of your device. Although traces on your circuit board may be electrically ‘short’ compared to the wavelength of the applied RF field, the field can still induce minuscule voltages/currents that can adversely affect the operation of your circuit. Sensors that provide current source outputs in the pA/nA can especially be affected. This typically shows up as a measurement error outside of the general specifications of the product.

Even non-analog parts of your circuit can be adversely affected by an applied RF field. For example, a very weak pull up resistor in the 1 M Ohm region on a static reset signal can be pulled below the ‘On’ threshold by an external RF field disturbance inducing a very small current on the signal. In terms of RF susceptibility, if design constraints allow you to avoid weak pull ups, it’s best to avoid them.

Wrap Up

In this post I’ve outlined the 7 most common causes of EMC failures I saw at my EMC lab over a 3 year period. Hopefully these tips can help you to avoid some seriously expensive failures.

-Andy Eadie

Republished with permission from EMC FastPass.

Tuesday, July 1, 2014

Linearization of EMC Amplifiers Continued – Determining Practical Harmonic Levels

Read other posts in the "Elephant in the Test Room" series here.

At the time of writing, I am waiting to see if borrowing 3D EM software is on the cards, so let’s postpone progress on Elephant #3 for the time being. I'm quite excited at the prospect of modeling the present automotive emissions test fixture, and equally important, modeling the proposed improvements. In the meantime, we can continue with the current live threads.

The Cell-Phone Threat

The 3G (WCDMA) Transmitted Waveform

As previously explained, unique allocated orthogonal codes running at high speed (3.84 MHz) are used to spread each user’s narrowband data. This is shown in Figure 1. The horizontal colored lines at the output of the mixers are the spread-data ready for combination, frequency translation, amplification and finally, transmission. Again, as previously explained, each user’s data can be recovered from the composite transmitted signal by use of the user’s self-same unique orthogonal code.

A screenshot of a real transmit signal amplified and ready to be fed to an antenna is shown in Figure 2 (the yellow trace). Clearly, this is an Agilent instrument, as is the waveform generator that created the test signal (WCDMA FDD Downlink Release 8, Test Model 1 + 16 DPCH). So, credit is due to Agilent for the screenshot.

The yellow trace doesn't tell the entire story in that occasionally the codes phase align, creating very large peaks. A different plot (not shown) shows the percentage of time peaks of various heights occur.

When I was first acquainted with the linear amplification of WCDMA signals (I’m guessing around the year 2000), these occasional peaks were 13dB (20 times) above the average composite signal power, a tough requirement for the amplifier if information was not to be lost. If you think about it, for the information to reach the other end undistorted, the amplifier must be able to amplify the peaks, so you need an amplifier rated at the peak power. If the average power is 10W and the peak is 20 times this, you need a 200W amplifier. Strangely, web research today says that the peak to average is far lower. Maybe software clipping is employed as well as amplifier linearization.

Topical and timely for our purposes is the fact that Agilent is presenting a webinar on how the cell phone communicates with the base station when first setting up a call. This is when the cell phone is emitting at its worst in terms of the likelihood of interfering with nearby electronic equipment.

The title is “A day in the life of your cell phone” and the presenter is Darcy Smith, a field application engineer at Agilent.

Well, wouldn’t you know it? This clashes with an event given by Rohde & Schwartz that I am registered to attend. The R&S tutorial on “RF Back to Basics” takes place in Austin, TX and sounds pretty good. Guess I need to choose which one to attend, as I really wanted to ask Darcy questions on the latest cell phone peak and average powers when they are polling for the nearest base station. My guess is it is somewhere between 1.0 and 2.0 watts, but it would be good to hear it ‘from the horse’s mouth.”

The Linearization of EMC Amplifiers

Reminder: In the previous post on this thread, we asked the $64,000 question, "what is a practical level of harmonics in an RF immunity system?"

With commercial testing, the amount of the test field created by harmonics is limited by stipulating that the harmonic field must be at least 6 dB down from the field created by the fundamental. Applying limits on the make-up of the test field to maintain the integrity of the test field has to be the way to go, since it covers all the imperfections in all of the equipment used in generating the test field. To do otherwise is simply conjecture based on likely worst-case performance of all the components in the line-up, plus perhaps an arbitrary safety margin. Bear in mind that cables will attenuate the harmonic, while the antenna will likely favor it to some extent or other. But, some antennas are better than others. What if you invest in components that give performance way better than the supposed worst cases? What need of the automotive 1 percent maximum amplifier harmonics then?

So, we will stick with the eminently superior approach that frames the integrity of the test field itself. Right then, if the harmonic field is 6dB down from the fundamental field (i.e. minus 6dBc), what portion of the total test field is allowed to be created by the harmonic?

Easy enough to deduce, but long winded in terms of step-by-step. The total field created during commercial calibration is 18v/m (10v/m test level plus 8v/m to allow for the peak field created by the AM modulation). We put the harmonic content at its allowed limit of -6dBc.

We are talking v/m, so

-6 = 20 log10 [harmonic field / fundamental field]

-6/20 = log10 [harmonic field / fundamental field]

-0.3 = log10 [harmonic field / fundamental field]

antilog10 (-0.3) = [harmonic field / fundamental field]

[harmonic field / fundamental field] = 0.5

That is the fundamental field is twice the level of the harmonic field.

The total test field is 18 v/m = fundamental field + harmonic field.

But, we just stated the fundamental field is twice the harmonic field.

So, 18v/m = 2 x harmonic field + harmonic field,

which means that 18v/m = 3 x harmonic field.

The harmonic field is 6v/m, leaving 12v/m for the fundamental field.

So, the maximum portion created by the harmonic is one-third of the test field (I misstated this in a previous post, sorry).

Just because we can, let’s apply this limit to automotive RF immunity testing. This means the prescribed 200v/m test field would be allowed to include up to 67v/m of harmonic field.

We established the dependence of the harmonic in the field E2 previously as:

To reinforce the fact that this is the level of the harmonic compared to the fundamental (the carrier, i.e. dBc), we will rename E2 as E2dBc

To find out the harmonic level from the amplifier when the harmonic field is -6dBc, we can make P2/P1 the subject of the equation.

For E2dBc = -6, the antilog10 [E2dBc/10] part is antilog10 -0.6 = 0.251

If we only knew the linear gain of the antenna at the fundamental and harmonic frequencies, we could complete the unknowns and establish the harmonic performance required from the amplifier, that is 10log10 [P2/P1].

A web search gives data on a typical 1-18 GHz antenna. I extended the data to create Table 1. It shows the harmonic gain next to the fundamental gain, and the delta between the two in dB.

A glance shows the worst case delta between a fundamental and its harmonic is at 8 GHz where the antenna gain at 8 GHz is 11 dBi and its gain at 16 GHz is 15 dBi.

The table shows the respective linear gains. Slotting these into the equation gives:

So, the harmonic performance from the amplifier is required to be -10dBc, a far, far cry from the automotive -20dBc.

I suppose if I wanted to alarm the automotive technical committee and insist amplifiers need to meet -20 dBc, I could say something like this:

“Data shows irrefutably that the low frequency antenna gain and the high frequency antenna gain can differ by more than 8dB, so harmonics must be kept extremely low.”

This is true in that the worst case between 1 GHz and 16 GHz is 15dBi minus 6.8dBi equaling 8.2dB. Pretty frightening but not representative of the actual worst case delta between any real life test frequency and its harmonic. Who cares that at 1 GHz, the gain is 6.8dBi and at 16 GHz, the gain is 15dBi. The two frequencies will not co-exist during testing. In fact, when the test frequency is 1 GHz, the delta between it and its harmonic (2 GHz) is only 1dB.

Personally, I’d double this minimum harmonic performance to -13dBc, partly as a safety margin, but in truth mainly because this is the performance of TWT amplifiers once they are past the first 20 percent of the band. Also, when it comes to our linearization exercise on improving the harmonics in the first 20 percent of the TWT amplifier band (can be as bad as minus 3dBc), an improvement of 10dB is not to be sniffed at. This is 10 times better and after all is said and done, when using one instrument to calibrate another, we are happy to insist the accuracy should be 10 times better than the instrument being calibrated.

-Tom Mullineaux